In the design of modern integrated circuits, particularly digital circuits, standard cells having fixed functions are widely used. Standard cells are often pre-designed, characterized, and saved in cell libraries. At the time integrated circuits (applications) are designed, the standard cells are retrieved from the cell libraries and placed into desirable locations. Routing is then performed to connect the standard cells with each other, and with other customized circuits on the same chip.
The performance and the routability of standard cells are affected by the cells' neighboring environment (referred to as cell-context hereinafter) in which they are located. For example, the cell's performance is affected by well proximity, poly spacing, stress and/or lithographic effects, and boundary conditions that are related to the actual cell abutting scenarios. The routability in a design is also determined based on actual placement situations of standard cells, such as whether they are placed loosely, tightly, or mixed with loose placement and tight placement. However, conventional integrated circuit design did not take the cell-context into consideration. Rather, conventional integrated circuit design was rule based with a set of pre-defined design rules guiding the design.
The design rules may specify where and how standard cells can or cannot be placed and routed. The rule-based approach means that all standard cells are subject to the same rules, and the cell-context, which is specific to each of the standard cells, is not considered. For example, the placement rules may require that in a specific integrated circuit design, that filler cells (or spaces) are added next to all standard cells, which requires white spaces and incur area penalty. Further, the rule-based design may require spare cells to be inserted, which causes higher power consumption. Sometimes, there is even no white space available, and hence it is impossible to successfully place and route cells without incurring performance degradation. In this situation, design re-spin interactions must be repeated to solve these issues. New integrated circuit design methods are thus needed to solve the above-discussed problems.